The PCI Special Interest Group (PCI SIG) has announced the release of the PCI Express (PCIe) 6.0 specification, which promises double the bandwidth and power efficiency of the PCIe 5.0 interfaces in today’s new CPUs and solid-state drives (SSDs).
PCIe is the key specification for the expansion bus used to connect CPUs and motherboards to graphics cards, Wi-Fi and SSDs, and a new update to the standard should double the PCIe Gen 5 specification’s bandwidth to a raw data rate of 64 Giga Transfers per second (GT/s), according to PCI SIG.
PCIe 6.0 has a bandwidth of 128 Gygabytes per second (GB/s) in a single direction on 16 lanes, which goes down to 8 GB/s on one lane.
This release is a more significant overhaul than PCIe 4.0 and 5.0 and arguably the largest in the history of the 19-year-old standard, thanks to new signaling technologies like Pulse-Amplitude Modulation 4 (PAM4) and its Flow control unit (FLIT) encoding, according to AnandTech.
As with previous releases of the PCIe specification, PCIe 6.0 will be compatible with previous releases of PCIe, allowing older devices to work in newer hosts and vice versa.
Devices with PCIe 6.0 interfaces won’t be available in products for a few years and, in any case, it’s now up to hardware vendors to implement the new standard.
However, as an indicator, PCI SIG released PCIe 5.0 in 2019 and it only started featuring in Intel’s new 12th Gen Alder Lake with up to 16 lanes of PCIe Gen 5 while Samsung launched its first enterprise solid-state drive (SSD) with the PCIe 5.0 interface in December. PCI SIG says in an FAQ that it expects products with PCIe 6.0 to be available in products 12 to 18 months after the release of the final specification.
The new release will initially target servers, artificial intelligence, data centers, high-performance computing, industrial, automotive, and military and aerospace applications. It may take several more years before it reaches consumer hardware.